1. Field of the Invention
The present invention relates to semiconductor module manufacturing methods, semiconductor modules, and mobile devices.
2. Description of the Related Art
Recently, with the trend toward miniaturization and high performance of electronic devices, there is a demand for further reduction of the size of semiconductor devices (semiconductor modules) used in electronic devices. With the trend toward miniaturization of the semiconductor devices, narrow-gap electrodes have become essential to be mounted on wiring substrates. As a surface mounting method of the semiconductor devices, a flip chip method is known which produces solder bumps on the electrodes of the semiconductor devices and solders the solder bumps and electrode pads of the wiring substrates. However, in the flip chip method, efforts for size reduction by narrowing the gap between electrodes have been successful only to a limited degree due to the constraints imposed by the size of solder bumps and solder bridges produced. To overcome the limitation, a metal plate may be half-etched so that a resultant bump structure is used as an electrode or a via, a semiconductor device may be mounted on the metal plate via an insulating layer of, for example, epoxy resin, and the electrode of the semiconductor device may be connected to the bump structure.
The alignment of a bump structure and an electrode of the semiconductor device is necessary for the embedding of the bump structure in the insulating layer, the lamination of a metal plate, an insulating layer, and a semiconductor device, and the integration. In the conventional manufacturing technology, a through hole for alignment is formed on the metal plate with a drill, and the bump structure of the metal plate and the electrode for the semiconductor device are aligned in accordance with the through hole of the metal plate and an alignment mark on the semiconductor device exposed through the hole. And, in the processing of the metal plate into a predetermined wiring pattern by lithography and etching, the through hole is also used for the alignment. However, the improvement of the accuracy of the alignment is challenging due to the scaling limit of the drill processing and its poor processing accuracy; and thus, the cost lowering in relation with the microfabrication of the semiconductor device (semiconductor module) as a result of the reduction in the manufacturing margin (alignment margin) comes with difficulty. Also, the drill processing itself adds the extra processing steps and has been one of the factors for the increased manufacturing cost of the semiconductor device (semiconductor module).